Silicon Photonics Packaging Engineer
Company: Ouster
Location: San Francisco
Posted on: November 13, 2024
Job Description:
At Ouster, we build sensors and tools for engineers,
roboticists, and researchers, so they can make the world safer and
more efficient. We've transformed LIDAR from an analog device with
thousands of components to an elegant digital device powered by one
chip-scale laser array and one CMOS sensor. The result is a full
range of high-resolution LIDAR sensors that deliver superior
imaging at a dramatically lower price. Our advanced sensor hardware
and vision algorithms are used in autonomous cars, drones, and many
other applications. If you're motivated by solving big problems,
we're hiring key roles across the company and need your help!We are
looking for a Silicon Photonics Packaging Engineer to design and
develop our IC packaging solutions. We are seeking an adaptable,
well-organized engineer who can work between hardware, systems, IC,
and operations to drive our packaging development. The role is San
Francisco based and will include some travel.RESPONSIBILITIES:
- Design microelectronic assembly processes for automotive-grade
receiver and transmitter packages/modules from wafer fab to package
integration.
- Define specifications for custom IC package designs and chip
carriers to meet product and qualification requirements. Work with
external partners to realize those parts.
- Plan and execute process optimization and characterization,
design validation, failure analysis, and sample builds for package
development and automotive qualification.
- Lead yield analysis and drive improvement/corrective actions
for silicon process and microelectronic assembly.
- Collaborate with external manufacturing partners to develop new
packaging processes and prototypes to meet IC and system
specifications.
- Manage vendors, including sourcing, vetting, quoting, design
for manufacturing (DFM), and low-volume order placement of diverse
components such as substrates, epoxies, coated glass, PCBAs, and
tooling.
- Drive mass production readiness with multiple engineering and
operation teams.BASIC QUALIFICATIONS:
- 5+ years in Semiconductor Package/Process Development or 2+
years with a relevant master's degree.
- Experience with multi-layer ceramic, CMOS image sensor, BGA
packages, and organic substrates.
- Experience in wafer level processing (dielectric thin film
deposition, RIE silicon processing, wafer-to-wafer bonding, spin
coat/lift-off processing, wafer dice and test).
- Experience in automated microelectronic and photonic assembly
processes (wafer inspection, high accuracy epoxy/solder die attach,
wire bonding, vision inspection, glob top/underfill dispense).
- Working knowledge of Failure Analysis tools such as X-ray, 3D
interferometry, DIC microscopy, SEM, cross-section, destructive
testing, etc.
- Understanding of CMOS image sensor architecture and operation
is preferred.BONUS QUALIFICATIONS:
- Bachelor's and/or Master's degree in Electrical or Mechanical
Engineering.
- Experience with optical systems.
- Experience with ATE package test environment.
- Experience with statistical analysis for volume production
processes.
- AEC-Q100 or related automotive qualification
experience.$120,000 - $180,000 a yearThe base pay will depend on
your skills, work experience, location, and qualifications. This
role may also be eligible for equity & benefits.At Ouster we offer
a range of competitive benefits, as we believe in taking care of
our employees in all aspects of their lives. Our newly renovated
office, located in the Mission District of San Francisco, is a
dog-friendly workplace with a kitchen stocked with snacks, fresh
fruit, and drinks, and a complimentary dinner catered nightly.
Additional perks include 15 vacation days/10 paid holidays
annually; paid parental leave; pre-tax commuter or health
care/dependent care accounts; 401K match up to 4%; medical, vision,
and dental plans with premiums covered at 100% for the employee and
75% for dependents (Cigna or Kaiser); life insurance; and
short-term disability and long-term disability. Ouster offers the
best benefit options available because we consider the well-being
of our employees a top priority.Ouster is an Equal Employment
Opportunity employer that pursues and hires a diverse workforce.
Ouster does not make employment decisions on the basis of race,
color, religion, ethnic or national origin, nationality, sex,
gender, gender-identity, sexual orientation, disability, age,
military status, or any other basis protected by local, state, or
federal laws. Ouster also strives for a healthy and safe workplace,
and prohibits harassment of any kind. Pursuant to the San Francisco
Fair Chance Ordinance, Ouster considers qualified applicants with
arrest and conviction records for employment. If you have a
disability or special need that requires accommodation, please let
us know.
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Keywords: Ouster, Vallejo , Silicon Photonics Packaging Engineer, Engineering , San Francisco, California
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